The present invention relates to a field-effect-controllable semiconductor component that is suitable for applications in radiofrequency circuits.
What acts in a restrictive manner for a use of MOS transistors for radiofrequency arrangements, in particular for the high-frequency switching of loads, is the parasitic gate-drain capacitance thereof, which is also referred to as the Miller capacitance or feedback capacitance. The effects and the properties of this feedback capacitance are described in detail in Stengl/Tihanyi: “Leistungs-MOS-FET-Praxis”, [“Power MOS-FETs in practice”], Pflaum Verlag, Munich, 1992, pages 73-79, or in Baliga: “Power Semiconductor Devices”, PWS Publishing, 1995, pages 384-387.
The mode of action of the feedback capacitance is explained briefly below with reference to FIG. 4. FIG. 4 illustrates a MOS transistor T with a gate terminal G, a source terminal S and a drain terminal D and a load connected in series with the drain-source path D-S thereof. The MOS transistor functions as a low-side switch connected between the load and the negative supply potential, or reference-ground potential. The load terminal remote from the MOS transistor is connected to the positive supply potential V+. FIG. 4 furthermore illustrates the parasitic gate-drain capacitance Cgd of the MOS transistor, which lies between the drain terminal D thereof and the gate terminal thereof and whose capacitance value increases in the on state in comparison with the off state. If the normally off MOS transistor illustrated is turned on by application of a suitable positive drive potential, then the potential at the drain terminal of the MOS transistor decreases from a value—which corresponds to the value of the supply potential V+ in the off state—approximately to reference-ground potential in the case of the transistor being fully turned on. This decrease in the voltage at the drain terminal D counteracts the drive potential at the gate terminal by way of the feedback capacitance, this feedback effect being greater, the larger the capacitance Cgd and the higher the switching frequency.
Power MOS transistors require cooling in order to prevent damage due to the heat loss that occurs during switching operations. The requirements made of this cooling increase as the switching frequency increases, owing to the heat loss that increases as the switching frequency increases. Optimum cooling conditions can be achieved if the semiconductor body with the transistor is applied directly to a heat sink.
Customary power transistors are formed as vertical components whose terminals for the gate and source terminals are situated at the front side of the semiconductor body and whose drain terminal is formed by the rear side of the semiconductor body. In the case of power transistors which serve as low-side switches and in which the drain potential changes depending on the switching state of the power transistor, direct application of the rear side of the semiconductor body to the heat sink is unsuccessful due to the fact that customary heat sinks are made of metal and, in particular in the case of high-frequency potential changes, act like an antenna and thus cause EMC interference. This is remedied by electrically insulating layers between the semiconductor body and the heat sink, which, however, increase the thermal resistance between semiconductor body and heat sink.